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1/13 l9333 march 2001 n wide operating supply voltage range from 4.5v up to 32v for transient 45v n very low standby quiescent current typically < 2a n input to output signal transfer function programmable n high signal range from -14v up to 45v for all inputs n 3.3v cmos compatible inputs n defined output off state for open inputs n four open drain dmos outputs, with r dson = 1.5 w for v s > 6v at 25c n output current limitation n controlled output slope for low emi n overtemperature protection for each channel n integrated output clamping for fast inductive recirculation v fb > 45v n status monitoring for - overtemperature - disconnected ground or supply voltage description the l9333 is a monolithic integrated quad low side driver. it is intended to drive lines, lamps or relais in automotive or industrial applications. so20 (12+4+4) die ordering numbers: l9333md (so20 12+4+4) l9333die1 (die) quad low side driver block diagram th er mal shut- down diag- nostic logic channel1 channel4 reference vlogic vint in 4 en vs gnd out 4 out 1 diag 4 prg = & r en in 1 r in vs prg r in multipower bcd technology
l9333 2/13 pin connection (top view) pin function pin n pin name description 1 in 1 input 1 2 in 2 input 2 3 diag diagnostic 4, 5, 6, 7, 14, 15, 16, 17 gnd ground 8 vs supply voltage 9 in 3 input 3 10 in 4 input 4 11 en enable 12 out4 output4 13 out 3 output 3 18 out 2 output 2 19 out 1 output 1 20 prg programming 1 2 3 4 5 6 7 813 14 15 16 17 18 19 20 9 10 11 12 in1 in2 diag gnd gnd gnd gnd vs in3 in4 prg out1 out2 gnd gnd gnd gnd out3 out4 en so 12+4+4 med. power
3/13 l9333 absolute maximum ratings note 1) : in flyback phase the output voltage can reach 60v. esd - protection note: human-body-model according to mil 883c. the device widthstand st1 class level. thermal data note 2) : with 6cm 2 on board heat sink area. life time symbol parameter value unit v s supply voltage dc supply voltage pulse (t = 400ms) -0.3 to 32 -0.3 to 45 v v dv s /dt supply voltage transient -10 to +10 v/s v in , v en , v prg input, enable, programming pin voltage -14 to 45 v v out output voltage -0.3 to 45 1) v v diag diagnostic output voltage -0.3 to 45 v parameter value against gnd unit supply pins and signal pins 2 kv output pins 4 kv symbol parameter min typ max unit t jsd temperature shutdown threshold 175 220 c t jsdhys temperature shutdown hysteresis 20 k so 12+4+4 r th (j-p) thermal resistance junction to pins 15 c/w r th (j-a) thermal resistance junction to ambient 2) 50 c/w symbol parameter condition value unit t b useful life time v s 14v en = low 20 years t b operating life time 4.5v v s 32v en = high 5000 hours
l9333 4/13 operating range: within the operating range the ic operates as described in the circuit description, including the diagnostic table. electrical characteristcs the electrical characteristics are valid within the defined operating conditions, unless otherwise specified. the function is guaranteed by design until t jsdon switch-on-threshold. symbol parameter condition min max unit v s supply voltage 4.5 32 v v in , v en , v prg input voltage -14 45 v v out output voltage voltage will be limited by internal z- diode clamping -0.3 60 v v diag diagnostic output voltage -0.3 45 v t j junction temperature -40 150 c symbol parameter test condition min. typ. max. unit supply i q quiescent current v s 14v; v en 0.3v t amb 85 c < 2 10 a v s 14v; v en 0.3v t a 150c 50 a v s 14v; en = high, output = off en = high, output = on 12 3.5 ma ma inputs, in1 - in4; programming, prg v inlow input voltage low -14 1 v v inhigh input voltage high 2 45 v i in input current 0v v in 45v 3) -25 50 a r in input impedance v in < 0v; v in > v s 10 60 k w note 3) : current direction depends on the programming setting (prg=high leads into a positive current see also blockdiagram pa ge 1) enable en v enlow input voltage low -14 1 v v enhigh input voltage high 2 45 v r en input impedance -14v < v en < 1.5v 5 k w i en input current 1.5v < v en < 45v 5 80 a
5/13 l9333 note : all parameters are measured at 125c. note 4) : see also fig.3 timing characteristics outputs out1- out4 r dson output on-resistor v s > 6v, i o = 0.3a 1.7 3.8 w i oleak leakage current v o = v s = 14v; t a < 125c 1 5 a v o = v s = 14v; t a < 150c 25 a v oclamp output voltage during clamping e fb 2mj; 10 ma < i o < 0.3a 45 52 60 v i osc short-circuit current v s > 6v 400 700 1000 ma c o internal output capacities v o > 4.5v 100 pf diagnostic output diag v dlow output voltage low i dl = 0.6ma 0.8 v i dmax max. output current internal current limitation; v d = 14v 1515ma i dleak leakage current v d = v s = 14 v; t a < 125 c 0.1 1 a v d = v s = 14 v; t a < 150 c 5 a timing characteristics 4) t d,on on delay time v s = 14v c ext = 0f; l ext = 0h only testing condition 10ma i 0 200ma 23.5s t d,off off delay time 3 4.5 s t set enable settling time 20 s t d,diag on or off diagnostic delay time 10 s s out output voltage slopes 2.5 9 16 v/s symbol parameter test condition min. typ. max. unit electrical characteristcs (continued)
l9333 6/13 figure 1. timing characteristics note 5) : output voltage slope not controlled for enable low! t v s v out v in t v en non-invertin g mode invertin g mode t set t d,off t d,on active t t 5) v prg s 0.8 v s 0.2 v t set
7/13 l9333 functional description the l9333 is a quad low side driver for lines, lamps or inductive loads in automotive and industrial applications. the logic input levels are 3.3v cmos compatible. this allows the device to be driven directly by a microcon- troller. for the noise immunity, all input thresholds have a hysteresis of typ. 100mv. each input (in, en and prg) is protected to withstand voltages from -14v to 45v. the device is activated with a 'high' signal on enable. enable 'low' switches the device into the sleep mode. in this mode the quiescent current is typically less than 2a. a high signal on programming input changes the signal transfer polarity from noninverting to the inverting mode. this pin can be connected either to v s or gnd. if these pins are not connected, the forced status of the prg and en pin is low. for packaged applications it is still recommended to connect all input pins to ground respective vs to avoid emc influence. the forced condition leads to a mode change if the prg pin was high before the interruption. independent of the programming input, the output switches off, if the signal input pin is not connected. this function is verified using a leakage current of 5a (sink for prg=high; source for prg=low) during circuit test. each output driver has a current limitation of min 0.4a and an independent thermal shut-down. the thermal shut-down deactivates that output, which exceeds temperature switch off level. when the junction temperature decreases 20k below this temperature threshold the output will be activated again. this 20k is the hysteresis of the thermal shutdown function. the gates, of the output dmos transistors are charged and discharged with a current source. therefore the output slope is limited. this reduces the electromagnetic radiation. for induc- tive loads an output voltage clamp of typically 52v is implemented. the diagnostic is an open drain output. the logic status depends on the programming pin. if the prg pin is 'low' the diag output becomes low, if the device works correctly. at thermal shut-down of one channel or if the ground is disconnected the diagnostic output becomes high. if the prg pin is 'high' this output is switched off at normal function and switched on at overtemperature. for the fault condition of interrupted ground, the poten- tial of vs and diagnostic should be equal. diagnostic table x = not relevant * selective for each channel at overtemperature pins en prg in out diag normal function h l l l (on) l (on) h l h h (off) l (on) h h l h (off) h (off) h h h l (on) h (off) l x x h (off) h (off) overtemperature, disconnected ground or supply voltage hlx h (off) * h (off) overtemperature h h x h(off) * l(on)
l9333 8/13 figure 2. application for inverting transfer polarity figure 3. application for non inverting transfer polarity note we recommend to use the device for driving inductive loads with flyback energy e fb 2mj. in out 1 out 2 out 3 out 4 in 1 in 2 in 3 in 4 gnd vs prg en diag adressdecoder a 0:8 d 0 d 1 d 2 d 3 8 vcc = 5v or 3.3v vcc gnd microcontroller int board voltage 14 v 2 w 12 mh 250 ma 50 khz vcc gnd vcc = 5v 33f 240 w 50pf 10h l9333 m in board voltage 14 v 2 w 12 mh 250 ma 10h vcc gnd vcc = 5v out 1 out 2 out 3 out 4 in 1 in 2 in 3 in 4 gnd vs prg en diag l9333 240 w 50pf m 33f
9/13 l9333 emc specification ems (electromagnetic susceptibility) measurement setup: dut mounted on a specific application board is driven in a typical application circuit (see below). two devices are stimulated by a generator to read and write bus signals. they will be monitored externally to ensure proper function. measurement method: a) the two bus lines are transferred 2m under a terminated stripline. that's where they were exposed to the rf-field. stripline setup and measurement method is described in din 40839-4 or iso 11452-5. b) dut mounted on the same application board is exposed to rf through the tophole of a tem-cell. mea- surement method according sae j1752. c) the two bus lines are transferred into a bci current injection probe. setup and measurement method is described in iso 11452-4. failure criteria: failure monitoring is done by envelope measurement of the logic signals with a lecroy oscilloscope with ac- ceptance levels of 20% in amplitude and 2% time. limits: the device is measured within the described setup and limits without fail function. the electromagnetic susceptivity is not tested in production. a) field strength under stripline of > 250v/m in the frequency range 1 - 400mhz modulation:am 1khz 80%. b) field strength in tem-cell of > 500v/m in the frequency range 1 - 400mhz modulation: am 1khz 80%. c) rf-currents with bci of > 100ma in the frequency range 1 - 400mhz modulation: am 1khz 80%. measured circuit the ems of the device was verified in the below described setup.
l9333 10/13 figure 4. 2m stripline f 2 16 7 8 13 9 1 11 125hz 250hz 500hz 17 4 5 1khz f 2 f 2 + - 14 u(t) 14 v flat cable anechoic chamber jumper smbyw01-200 sm6t39a 33f 10nf 10k w 4.7nf 4.7nf 10k w 20k w 4 * 4.7n 4.7nf 4 * 1nf optional vs en prg diag out1 out2 out3 out4 in1 in2 in3 in4 gnd l9333 4 * 10k w 4 * 100 w optional 1 16 17 4 5 9 11 19 14 13 8 7 jumper
11/13 l9333 11 0 11 20 a e b d e l k h a1 c so20mec h x 45? so20 (12+4+4) dim. mm inch min. typ. max. min. typ. max. a 2.35 2.65 0.093 0.104 a1 0.1 0.3 0.004 0.012 b 0.33 0.51 0.013 0.020 c 0.23 0.32 0.009 0.013 d 12.6 13 0.496 0.512 e 7.4 7.6 0.291 0.299 e 1.27 0.050 h 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 l 0.4 1.27 0.016 0.050 k 0? (min.)8? (max.) outline and mechanical data pad
l9333 12/13 l9333
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics a 2001 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - sin gapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com 13/13 l9333

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